1. Field of the Invention
The present invention pertains to spin-transfer torque random access memory (STT-RAM), and, in particular, to a magnetic-assisted nondestructive self-reference sensing method for STT-RAM.
2. Description of the Related Art
Demand for high capacity, nonvolatile solid-state data storage devices is expanding, largely due to fast growth in the computing and handheld/communications industries. One example of such a nonvolatile solid-state data storage device is flash memory. Flash memory, however, has several drawbacks, such as slow access speed (˜ms write and ˜50-100 as read), limited endurance (˜103-104 programming cycles), and integration difficulty in system-on-chip (SoC) applications. Flash memory (NAND or NOR) also faces significant scaling problems at 32 nm nodes and beyond.
Magneto-resistive Random Access Memory (MRAM) is another type of data storage device used for nonvolatile and universal memory. MRAM features non-volatility, fast writing/reading speed (<10 ns), almost unlimited programming endurance (>1015 cycles), and zero standby power.
In MRAM, data is not stored as electric charge as in conventional random access memories (RAM) like dynamic random-access memory (DRAM) and static random-access memory (SRAM). Instead, in MRAM, data is stored by a number of magnetic storage elements or cells. The basic component of an MRAM is a magnetic tunneling junction (MTJ). Data storage is realized by switching the resistance of an MTJ between a high-resistance state and a low-resistance state.
More specifically, FIG. 1A is a cross-sectional schematic diagram of an illustrative MTJ memory cell 10 in the low resistance state and FIG. 1B is a cross-sectional schematic diagram of the illustrative MTJ memory cell 10 in the high resistance state. As seen in FIGS. 1A and 1B, the MTJ memory cell 10 includes as ferromagnetic free layer 12 and a ferromagnetic reference (i.e., pinned) layer 14. Ferromagnetic free layer 12 and ferromagnetic reference layer 14 are separated by an insulating barrier layer 13. A first electrode (or contact) 15 is electrically coupled to ferromagnetic free layer 12 and a second electrode (or contact) 16 is electrically coupled to ferromagnetic reference layer 14. The ferromagnetic layers 12, 14 may be made of any suitable ferromagnetic (FM) alloy such as, for example, Fe, Co, Ni, and the insulating barrier layer 13 may be made of an electrically insulating material such as, for example, an oxide material (e.g., Al2O3 or MgO). Other suitable materials may also be used. The electrodes 15, 16 electrically connect the ferromagnetic layers 12, 14 to a control circuit providing read and write currents through the ferromagnetic layers 12, 14.
The resistance across the MTJ memory cell 10, and thus the resistance state (high or low) thereof, is determined by the relative orientation of the magnetization vectors or magnetization orientations (shown by the arrows in FIGS. 1A and 1B) of the ferromagnetic layers 12, 14. The magnetization direction of the ferromagnetic reference layer 14 is pinned (fixed) in a predetermined direction while the magnetization direction of the ferromagnetic free layer 12 is free to change.
FIG. 1A illustrates MTJ memory cell 10 in the low resistance state where the magnetization orientation of ferromagnetic free layer 12 is parallel and in the same direction as the magnetization orientation of ferromagnetic reference layer 14. This is typically termed the “low” or “0” data state. FIG. 1B illustrates MTJ memory cell 10 in the high resistance state where the magnetization orientation of the ferromagnetic free layer 12 is anti-parallel and in the opposite direction of the magnetization orientation of ferromagnetic reference layer 14. This is typically termed the “high” or “1” data state.
In one known method, the state of an MTJ memory cell 10 of an MRAM is changed by using as current induced magnetic field to switch the magnetization of the MTJ. However, as the size of MTJ memory cell 10 shrinks, the switching magnetic field amplitude increases and the switching variation becomes more severe, leading to certain undesirable effects.
As an alternative method, spin polarization current can also be used to induce magnetization switching in MRAM designs. Spin-Torque Transfer RAM (STT-RAM) uses a spin polarized (bidirectional) current through the MTJ to realize the resistance switching. More specifically, switching the resistance state and hence the data state of MTJ memory cell 10 via spin-transfer occurs when a current, passing through a magnetic layer of the MTJ memory cell 10, becomes spin polarized and imparts a spin torque on ferromagnetic free layer 12 of MTJ memory cell 10. When as sufficient spin torque is applied to ferromagnetic free layer 12, the magnetization orientation of the ferromagnetic free layer 12 can be switched between two opposite directions and accordingly the MTJ memory cell 10 can be switched between the parallel state (i.e., low resistance state or “0” data state) and the anti-parallel state (i.e., high resistance state or “1” data state) depending on the direction of the current. The switching mechanism of STT-RAM is constrained locally and STT-RAM is believed to have a better scaling property than conventional MRAM.
Thus, MTJ memory cell 10 as described may be used to construct a memory device that includes multiple MTJ memory cells 10, where a data bit may be stored in each MTJ memory cell 10 by changing the relative magnetization state of free layer 12 with respect to reference layer 14 using, for example, spin polarization current. Each stored data bit can be read out by measuring the resistance of the associated MTJ memory cell 10 using various sensing (reading) schemes.
In one conventional sensing (reading) scheme, the data of an STT-RAM bit is read out by comparing the MTJ resistance to a reference value. When the MTJ resistance difference for the data “1” and “0” is large, the two resistance states of some MTJs may be all higher or lower than the reference value. As a result, the memory bits are constantly detected as “1” or “0”. The accuracy of this conventional sensing scheme is significantly affected by the randomness of the reference value induced by process variations among different cells.
In another known sensing scheme, referred to as a destructive self-reference sensing scheme, the bit line (BL) voltage generated by the original data stored in an MTJ is directly compared with the BL voltage generated by a reference data (usually data “0”) stored in the same MTJ. Since the reference signal is generated from the same memory bit, the process variation incurred by the bit-to-bit variations of MTJ cells is excluded from the sensing operation. Finally, the original data needs to be written back to the memory bit because it has been overwritten by the reference value, which increases costs, latency and power consumption.
Another known sensing scheme, referred to as a nondestructive self-reference sensing scheme, leverages the different sensing current dependency of the two resistance states of an MTJ without destructively writing the predetermined reference data. Both a current and a voltage driven scheme have been developed. The current-driven scheme is based on the fact that when read current increases, the resistance of the MTJ at the high resistance state decreases rapidly, while that of the MTJ at the low-resistance state decreases slightly. The voltage-driven scheme applies two different voltages on a bit line and detects the differences between the corresponding currents through the MTJ. These schemes thus exploit the difference between the R-I curve of the parallel and the anti-parallel states, and require a voltage divider which consists of two resistor of different resistance. The resistance values, as well as the sensing current ratio, must be carefully controlled for such schemes to work properly, a feature that is difficult to achieve during fabrication.
There is thus a need for an improved sensing (reading) scheme for STT-RAM devices.